Ultrasonic Spraying Machine - Applied to Semiconductor Wafer Coating

 

Lithography: Exposure and Anti Corrosion Coating

Summary
In semiconductor manufacturing, structures are created on chips through photolithography methods. The photosensitive film, mainly a resist layer, is coated on the top of the chip to form a pattern, and then transferred to the underlying layer.

 

Photolithography includes the following process steps:

1. Add adhesive and remove surface moisture
2. Anti corrosion coating
3. Stabilization of the corrosion-resistant layer
4. Exposure
5. Development of corrosion inhibitors
6. Curing of corrosion inhibitor
7. Inspection

In some processes, as ion implantation, the resist is used as a mask to cover certain areas that should not be doped. In this case, the patterned resist layer will not transfer to the underlying layer.

 

Coating
The coating of the chip is achieved through the spin coating method on a rotating chuck. At low rotation, the resist is rotated and then leveled at a speed of, for example, 2000 to 6000 rpm. According to the subsequent process, the thickness of the resist layer can reach up to 2 microns. The thickness depends on the rotational speed and viscosity of the resist.

In order to obtain a uniform layer, the resist contains water and a solvent that softens it. For stability reasons, the wafer is subsequently annealed (post/soft baked) at approximately 100 ° C. Water and solvent partially evaporate, and some moisture must be retained for subsequent exposure.

 

 

Wafer coating

Wafer coating is a unique process that facilitates the automatic application of chip bonding adhesives at the wafer level, followed by the B-stage to form a chip bonding film. FUNSONIC's spray coating technology is suitable for wafer coating, which can achieve process speed, thickness control, and material uniformity. After the hot or UVB stage and wafer cutting, chip connections are achieved through heating and pressure to produce consistent adhesive lines and small, controlled corners. The adhesive coating on the backside of the wafer is an ideal choice for chip mounting applications where corner control is crucial.

Coated semiconductor wafers, especially silicon wafers, are suitable for use in the semiconductor industry, particularly for manufacturing high-density integrated electronic components such as microprocessors or storage chips. For modern microelectronics, strict requirements for global and local planarity, edge geometry, thickness distribution, reference local planarity on one side (known as nanotopology), and defect free starting materials (so-called substrates) are necessary.

 

In order to deposit epitaxial coatings on semiconductor wafers in an epitaxial reactor, deposition gases are passed through the reactor to deposit epitaxial materials on the surface of the semiconductor wafer. However, in addition to being deposited on semiconductor wafers, the material is also deposited inside the epitaxial reactor. For this reason, it is usually necessary to periodically remove the residues that have accumulated on the surfaces of epitaxial reactors in an uncontrolled manner during deposition.

For example, while the virtual wafer is arranged on the pedestal of the epitaxial reactor, during the corresponding repeated cleaning process after a certain number of coated semiconductor wafers, the initial etching gas passes through the epitaxial reactor, and the deposition gas used for depositing silicon is subsequently passed through the epitaxial reactor.

By etching gases such as hydrogen chloride, residual materials from the previous coating process can be removed, and by depositing gases, the interior of the epitaxial reactor can be sealed, for example, to prevent impurities (diffusing from the surface into the epitaxial layer) from reaching the subsequently coated semiconductor wafer.

However, during the coating process of semiconductor wafers, changes in geometric shape still occur between individual semiconductor wafers. Especially in the edge area of the coating, there is a significant difference, which is harmful to the quality of the coated semiconductor wafer. For example, edge regions may therefore be unavailable or only available for applications with lower quality requirements.

For example, attempting to coat the edge regions of semiconductor wafers in a controlled manner by setting the gas flow rate of the deposition gas used for depositing epitaxial layers.

Therefore, it is expected to provide the possibility of avoiding or at least reducing changes in the geometric shape of semiconductor wafers coated epitaxially.